1. Field of the Invention
This invention relates to a semiconductor device such as a bipolar transistor or a MOS transistor which has a silicon layer containing an N-type (P-type) impurity on a P-type (N-type) semiconductor substrate and a method of producing the semiconductor device.
2. Description of the Prior Art
A method of reducing the junction depth of a source drain region which is a diffused layer region in order to improve the short channel effect provided by reduction of the gate length of a MOS transistor is known popularly. Conventionally, ion implantation is used for formation of a diffused layer region, and in order to form an n+ diffused layer, ion implantation of arsenic or phosphor is performed, but in order to form a p+ diffused layer, ion implantation of boron or BF.sub.2 is performed.
In order to form a source drain of a comparatively small junction depth, the following points are important:
(1) to minimize the implantation energy; PA1 (2) to set the temperature in heat treatment in the production process after the implantation as low as possible so that the ion-implanted impurity may be diffused as little as possible; and PA1 (3) to prevent a channeling phenomenon which makes an obstacle to formation of a shallow junction.
Here, the channeling phenomenon mentioned in the third point above is a phenomenon wherein, when impurity ions are implanted into silicon single crystal, they travel deeply into the silicon single crystal passing through gaps in the atomic configuration. This channeling phenomenon appears remarkably particularly where ions of a low mass number such as boron ions are employed. In this instance, even if ion implantation is performed with low energy, it is very difficult to form a shallow p+ diffused layer.
Several attempts have been proposed to prevent the channeling phenomenon. For example, in Japanese Patent Laid-Open No. Hei 2-191341, it is disclosed that ions of Si+ or Ge+ are first implanted into a transistor formation region to form an amorphous region as seen in FIG. 1(a) and then ions of B+ (BF.sub.2 +) are implanted into the amorphous region to form a source drain diffused layer as seen in FIG. 1(b) to prevent channeling in vertical and horizontal directions involved in formation of a source drain diffused layer.
On the other hand, in a silicon bipolar transistor, a base diffused layer is conventionally formed by ion implantation, and in order to form a shallow base diffused layer, a method wherein the implantation energy is set low or another method wherein BF.sub.2 ions or like ions having a high mass number are used is taken. However, even where those methods are employed, since a channeling phenomenon still appears similarly as in the case of a MOS transistor described above, a tail portion which exhibits a lower impurity concentration is formed on the bottom face of the base diffused layer as seen in FIG. 2(a). Consequently, it is difficult to make the base junction depth shallow.
It is to be noted that a method of forming an epitaxial base layer using an MBE (molecular beam epitaxy: molecular beam epitaxial growth method) technique or a low temperature CVD technique which employs a high degree of vacuum has been proposed in recent years, and where this method is employed, an impurity concentration distribution having a so-called box shape wherein the tail portion of the base layer is small as seen in FIG. 2(b) is obtained. Actually, however, since the base impurity is diffused into the silicon substrate by heat treatment for emitter drive-in or some other heat treatment in the process of production which is performed after formation of the epitaxial base layer, it is impossible to fully eliminate the tail portion of the base. If such tail region of the base layer is present, this increases the base width and deteriorates the high frequency characteristic, and moreover also the Early's effect of the bipolar transistor becomes remarkable and the transistor characteristic is deteriorated. Here, the Early's effect signifies a phenomenon wherein, as the collector-base junction is reversely biased, the depletion layer on an interface of the base-collector junction is expanded and the effective base region length is decreased, and consequently, the gradient of injection minority carriers in the neutral base region becomes steeper and the collector current increases while the base current does not vary very much. A phenomenon wherein the current gain increases as the reverse bias to the collector-base junction is increased in this manner is generally called Early's effect. This phenomenon is argued, for example, in Minoru Nagata, "Very High Speed Bipolar Device", under the supervision of Takuo Sugano, Baifukan, pp.58-59.
As seen in FIG. 3, as the collector is biased with respect to the emitter, that is, as the reverse bias between the collector and the base increases, the collector current exhibits a great increase under a fixed base current. The Early voltage V.sub.A is-defined by a voltage at an intersecting point of an extension line (indicated by a broken line in FIG. 3) of a collector current to collector-emitter voltage characteristic. It can be said that, as the absolute value of the Early voltage V.sub.A increases, the influence of the Early's effect decreases. If the Early voltage drops, then a constant current characteristic in an active region of a current-voltage characteristic of a transistor cannot be obtained, resulting in such a drawback on a circuit that the characteristic of a constant-current source which is employed in the circuit.
In recent years, in order to improve the Early voltage of a bipolar transistor, a silicon type hetero junction bipolar transistor which employs, for the base, a material having a forbidden band narrower than that of single crystal silicon, for example, mixed crystal of silicon and germanium (hereinafter referred to briefly as SiGe layer) has been proposed in a document by D. L. Harame et al, IEDM Tech. Dig., 1993, pp.71-74.
In this transistor, the Ge concentration has, in an intrinsic base layer, a distribution such that it is lower on the emitter region side and higher on the collector side. For example, the Ge concentration has such an inclined concentration distribution that the content of Ge on the emitter side is 0% while the content of Ge on the collector side is 10 to 25%. Since electrons which are minority carriers are accelerated by a drift electric field produced from the inclined distribution of the Ge concentration, as the reverse bias between the collector and the base increases, the depletion layer of the base-collector junction is expanded. Thus, even if the effective base region width becomes short, the drift electric field prevents the slope of injected minority carriers distribution in the neutral base region from becoming steeper, thereby preventing a drop of the Early voltage.
However, the conventional methods of producing semiconductor devices such as a MOS transistor and a bipolar transistor described above have the following problems.
As described above, in order to form a source drain region of a small junction depth, heat treatment in the process of production after implantation is preferably performed at a temperature as low as possible so that an ion-implanted impurity may not be diffused as much as possible. On the other hand, in order to activate impurity ions to obtain a sufficient carrier concentration, heat treatment is preferably performed at a temperature as high as possible. From this, the heat treatment temperature naturally has an optimum range, and heat treatment is normally performed at a temperature of approximately 750.degree. C. to 850.degree. C. However, by a mere countermeasure of using a low temperature within such temperature range for heat treatment, it is very difficult to form a very shallow diffused layer having, for example, a junction depth of 0.1 .mu.m or less because of an influence of the channeling phenomenon described above.
According to the method disclosed in Japanese Patent Laid-Open No. Hei 2-191341, although it is possible to prevent channeling in the vertical and horizontal directions by implanting ions of Si.sup.+ or Ge.sup.+ into a transistor formation region to form an amorphous region in advance, leak current by a second order defect is produced as a result of the formation of the amorphous region. It is very difficult to suppress this leak current. It is to be noted that a method of preventing an increase of the leak current by making the depth of the amorphous region great is disclosed in Japanese Patent Laid-Open No. Hei 2-191341. For example, it is disclosed that, by performing ion implantation three times using implantation energies of approximately 50 keV, 200 keV and 400 keV, an amorphous region of the depth of approximately 0.5 .mu.m can be obtained. In this instance, however, a second order defect in a low energy condition (a condition to make a portion of a substrate around the surface into an amorphous state) like the following matters.
That is to say, although a second order defect introduced to the depth of approximately 0.5 .mu.m with 400 keV does not make a cause of leak current since it is spaced by a sufficient distance away from the diffused layer, since another second order defect introduced with 50 keV is formed in the proximity of the surface, it makes it liable to produce leak current readily.
In the method of forming an epitaxial base layer of a bipolar transistor using the MBE technique or the low temperature CVD technique, a base impurity is diffused into a silicon substrate by heat treatment for emitter drive-in or some other heat treatment in the process of production which is performed after formation of the base layer, and consequently, it is difficult to realize a fully box-shaped impurity concentration distribution having no tail portion. As described hereinabove, if the base layer has a tail portion (that is, if the doping concentration of the base region is all most the same as that of the collector region), the drop of the Early voltage appears remarkably.
In the method wherein the Ge concentration distribution in a SiGe intrinsic base layer is set to an inclined concentration distribution wherein the Ge concentration is lower on the emitter region side and higher on the collector side, if it is intended to further improve the Early voltage of the bipolar transistor, then the Ge concentration slope must be made steeper. If the Ge concentration slope becomes very steep, then the amount of Ge contained in the entire base layer increases, and in this instance, if the base layer is formed in a thin film, then a high strain (strain of the layer) condition cannot be maintained and a defect is produced in the interference of the base-collector junction. For example, where an inclined concentration distribution wherein the content of Ge is 0% on the emitter side and 30 to 40% on the collector side is employed, a high strain (strain of the layer) condition cannot be maintained unless the base layer is formed with the film thickness of, for example, less than 50 nm. Consequently, a film thickness with which a high strain condition can be maintained and an optimum base layer film thickness with which a predetermined emitter-collector break-down voltage property is obtained do not coincide with each other.